ECOS Studio: An RTL-to-Chip Silicon Design Solution with Open-Source EDA, IP, and PDK

The open-source chip design movement has long been limited by fragmented EDA tools and a lack of access to mainstream process nodes. In this talk, we present ECOS Studio, an integrated RTL-to-chip solution that combines an open-source EDA toolchain (ECC), an open IP library, and the newly released ICsprout 55nm open PDK. This end-to-end flow automates supply‑chain complexities so that users can focus on RTL design and receive functional silicon. We will share recent tape-out experiences, including the successful fabrication of a RISC‑V SoC (RetroSoC) on the 55nm process at 100 MHz, as well as a Multi-Project Chip aggregation scheme that shares the SoC environment across designs to lower per-design cost. We will also discuss how ECOS Studio is being deployed in the “One Student One Chip” education initiative, providing a zero‑configuration EDA environment to students. The talk demonstrates how the convergence of open EDA, open IP, and open PDK is bringing us closer to a future where silicon design is as ubiquitous as software.

Repo links for ECOS Studio: https://github.com/openecos-projects/ecos-studio ECC: https://github.com/openecos-projects/ecc ICS55 PDK: https://github.com/openecos-projects/icsprout55-pdk retroSoC: https://github.com/retroSoC/retroSoC