In this talk, we will present the OpenFPGA project, which is an open-source framework that automates the cumbersome process in prototyping an FPGA chip. Using the OpenFPGA, the layouts of a 160k-LUT custom FPGA can be generated within 24-hours using standard ASIC design tools, which requires a 18 month development cycle even for FPGA vendors. OpenFPGA has enabled publicly available open-source FPGA chips/IPs, e.g., the Skywater Open-source eFpgAs (SOFA), which are production-ready eFPGA IPs for researchers/engineers to reuse in their SoC designs.
About 唐希凡
唐希凡目前在美国犹他大学担任研究助理教授。他的研究着重于FPGA的架构以及自动化设计技术。他于2011年在复旦大学获得学士学位，2013年在瑞士联邦理工学院获得硕士学位，2017年在瑞士联邦理工学院获得博士学位。2018-2020年他在美国犹他大学担任博士后。他是开源FPGA基金会的创始人之一。他在2015年获得中国杰出自费留学生奖。
About Ganesh Gore
Ganesh is currently a Ph.D. student at the University of Utah, where he works on OpenFPGA-an OpenSource FPGA fabric generator tool.
He is presently exploring the Automated Physical design methodologies for medium and large-scale FPGAs.
His research interests are Physical hierarchical design, Reconfigurable computing, Computer-aided design, and Education Technology.